1. Field of the Invention
The invention relates to label assemblies and methods of using labels, and more particularly, to labels indicating top view or bottom view lead locations for integrated circuit packages and methods of utilizing such label assemblies to enable one to conveniently create electronic system schematic drawings and corresponding printed circuit boards.
2. Description of the Prior Art
Integrated circuits are now widely utilized in electronic systems to perform a wide variety of linear and digital circuit functions. Integrated circuits are commonly housed in dual-in-line packages (DIP) having from a few to a large number of lead connectors aligned along opposed edges of the dual-in-line packages. An electronic system is ordinarily implemented by mounting a number of integrated circuits on printed circuit boards. In order to design an electronic system using integrated circuit packages, an engineer may prepare a system block diagram by means of blocks which represent the various integrated circuit components of the electronic system and by means of interconnecting lines which represent various conductors which connect the various leads of the integrated circuits to provide an operable system. The electronic system is usually initially built in the form of a prototype system wherein sockets having line pins (referred to as "wire-wrap" pins) extending from the bottoms of the sockets are mounted on a card or chassis; conductors are "wire-wrapped" to such pins by means of "wire-wrap" tools which are well known in the art. After all of the necessary interconnecting conductors are wire-wrapped to the proper pins, the various integrated circuits are then inserted into their corresponsing sockets to test the operation of the prototype and make modifications thereto if necessary.
Although skilled electrical engineers and technicians are usually generally familiar with the operation and capabilities of various integrated circuits which are commonly used in their particular area of the electronic art, they don't ordinarily recall precisely which integrated circuit package leads are to be connected to the various data, power supply, or control inputs and outputs of each integrated circuit. In order to make diagrams which are useful to enable technicians or operators to fabricate the above mentioned prototypes, it is necessary for the engineers to spend a great deal of time "looking up" each integrated circuit utilized in the system in manufacturers' catalogs to determine the functions of the integrated circuit package leads. Manufacturers' catalogs ordinarily show the integrated circuit package lead configuration only with reference to a top view of the integrated circuit package. However, wire-wrapping operations for providing the necessary connections between integrated circuit units are ordinarily made by a technician by looking at the bottoms of each integrated circuit socket. In order to determine which wire-wrap pin a particular conductor must be connected to, the technician must mentally "reverse" the top view of the lead connections for the particular integrated circuit to envision the "bottom view" location and lead number of the corresponding integrated circuit. This mental reversal leads to frequent interconnection errors by technicians during fabrication of prototypes of electronic systems. Consequently, considerable time is lost in locating and correcting such interconnection errors.
Accordingly, it is an object of the invention to provide a convenient label assembly which provides labels to indicate lead locations for commercially available integrated circuits to facilitate making of block diagrams of electronic systems incorporating the integrated circuits.
Another object of the invention is to provide a system which enables engineers to prepare block diagrams of electronic systems utilizing integrated circuits without having to refer to manufacturers' integrated circuit catalogs to determine integrated circuit lead locations.
Still another object of the invention is to provide a system for facilitating assembly of electronic systems utilizing electronic circuits while minimizing interconnection errors due to mental reversal of top view lead location diagrams of integrated circuit packages.
When a prototype of an electronic system has been sufficiently tested and modified to ensure an economical, reliable product, printed circuit boards then are prepared, wherein metal conductors disposed on an insulating "board" or card are routed to provide the various interconnections required between leads of various integrated circuits. The patterns on printed circuit boards are commonly provided by use of photographic "negatives" in conjunction with photographic processes which enables the desired metal interconnection patterns to be provided by well known etching processes. The artwork from which the photographic negatives are produced is commonly laid out or drawn by hand. Sometimes paste-on "blocks" and gummed tape of predetermined width are utilized to designate integrated circuits and strips of metal interconnecting various points on the printed circuit card. The artwork is then photographed to produce the above mentioned negatives. Frequent reference to the above mentioned manufacturers' catalogs to determine lead locations is required to make such schematic block diagrams, and requires a great deal of painstaking artwork by artists skilled in this area. The cost of printed circuit board artwork is therefore quite expensive. There is an unmet need for a lower cost means of making printed circuit board artwork.
Accordingly, it is an object of the invention to provide a system for making printed circuit board artwork directly from engineering drawings.
A novelty search directed to the invention of the present application uncovered U.S. Pat. Nos. 2,213,666, 3,460,281, 3,769,895 and 2,049,867, which disclose various labels, none of which solve the above mentioned problems of the prior art.